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Concept Engineering releases version 6.0.0 of it's SpiceVision, Sgvision, GateVision and RTLVision PRO visualisation products. Read about new features ...

Orora Design Technologies, Inc., a company focused on automating mixed-signal IC design and verification, today unveiled Arana behavioral modeling platform. Arana is the industry’s first tool to automatically extract intelligent behavioral models in Verilog-A/MS/D from a circuit netlist, offering 100x to 1000x speedup for complex mixed-signal functional verification.
Arana is the culmination of ten years of innovative research at Orora supported by the Defense Advanced Research Projects Agency, Defense Threat Reduction Agency, and Air Force Research Laboratory. Over twenty semiconductor companies have validated Arana on forty production circuits including phase-locked loops, data converters, SerDes, DC-DC converters, memory, and custom-digital circuits. Read more ...

User Benchmark of PrimeTime vs. GoldTime for STA DeepChip ESNUG 479.
Signal Integrity. We did all our timing analysis with GoldTime signal integrity turned on. (i.e. GT 1.5 hr, PT 3.0 hr, ETS 6.0 hrs was with SI.) I was impressed by how little time GoldTime took to perform the full-chip, SI-aware timing analysis with propagated clocks. [ Dr. Evil ] Read more ...

GoldTime Parametric OCV – The Practical Approach to Statistical Timing
Extreme DA introduces Parametric OCV, a lightweight approach that enables statistical analysis without a huge upfront investment. Use your corner libraries and existing signoff flows while leveraging the statistical analysis of cell and interconnect variation. GoldTime POCV provides the technology and capabilities to enable SSTA for every company, no matter how big or small. Don't put your silicon at risk or produce uncompetitive, over-margined designs. Read more ...

Teklatech bridges the analog/digital design gap
Start-up launches design tool for mixed-signal and EMI/EMC sensitive ASIC design @ DATE 2009 conference 21-23 April in Nice, France

Start-up EDA company Teklatech is releasing a break-through design automation technology at this year's DATE, a technology which successfully bridges the gap between analog and digital design optimization. The technology represents a major step forward for e.g. wireless design, which is suffering under the disturbance of noise from larger digital circuitry and faster current transients. Other high impact segments include noise sensitive digital ICs in highly integrated systems such as mobile phones, as well as automotive and aerospace chips with strict EMI/EMC compliancy requirements. With semiconductor technologies in nano scale geometries, power and noise integrity presents a major obstacle to design closure, inhibiting the optimal utilization of the newest and most advanced fabrication technologies. Read more ...

News Archive

Parasitics: an old problem reaches new heights Gerhard Angst, Concept Engineering. Read more ...;

‘Golden’ timing signoff – does it correlate to Spice? - Ruben Molina , Extreme-DA - Read more ...;

Teklatech Joins ARM Connected Community- Read more ...;